A CMOS inverter's static power dissipation is dominated by which mechanism in modern deep-submicron nodes?
ASubthreshold + gate leakage (rises as Vth falls)
BDynamic CV²f only with no static term at all
CShort-circuit crowbar current always dominates static
DResistive R·I² in metal interconnect always dominates
Answer & Solution
Correct answer: A. Subthreshold + gate leakage (rises as Vth falls)
Sub-100 nm CMOS: leakage (subthreshold + gate tunneling + GIDL) becomes comparable to switching power. Drives Vt + multi-Vt design + power gating in SoCs.
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