The HAZARD called a 'static-1 hazard' in combinational logic refers to which?
AClock signal carries the wrong operating frequency
BOutput stays 1 forever despite a 0-valued input
COutput drops to 0 when steady-state should be 1
DSetup time gets violated only during chip startup
Answer & Solution
Correct answer: C. Output drops to 0 when steady-state should be 1
Static-1 hazard: input transition between two minterms both giving F=1 causes a 0 glitch via uncovered transition. Covered by adding the bridging prime implicant.
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