alleryStart learning →A SRAM cell typically uses how many MOSFETs per stored bit in the standard 6T topology?
A6 transistors (two inverters + two access)
B4 transistors only in any topology variant
C2 transistors plus a single storage capacitor
D8 transistors with one polysilicon resistor
Answer & Solution
Correct answer: A. 6 transistors (two inverters + two access)
6T SRAM: two CMOS inverters cross-coupled (4 MOSFETs) plus 2 access NMOS gated by word line.
Reads + writes via complementary bit lines. DRAM uses 1T1C.
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