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The TEST-AND-SET ($TAS$) hardware instruction has the property that it
Aatomically reads then writes a value in one step
Bblocks all other CPU cores until released
Calways returns 0
Dis a software function with no special hardware support
Answer & Solution
Correct answer: A. atomically reads then writes a value in one step
1. OSTEP §28.7 explains $TAS$: a hardware-level instruction that ATOMICALLY:
- Reads the old value at a memory address
- Writes a new value (e.g. 1) to that address
- Returns the old value
2. ATOMICITY is the key property — no other thread or interrupt can intervene between the read and write. This is implementable in single instruction (xchg on x86, ldrex/strex on ARM).
3. Using $TAS$ to implement a lock: spin until $TAS(\&L)$ returns 0 (i.e. lock was free).
4. Without atomicity, two threads could both see L=0 and both set it to 1 — both would think they hold the lock (a race condition).
5. Options B-D misstate the semantics.
_Source: OSTEP Ch 28, §28.7 (Test-And-Set — atomic exchange), p. 6._
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