Without atomic hardware support, building a correct mutual-exclusion lock for $N \geq 2$ threads is

1. OSTEP §28.2-28.3 explores building locks without hardware atomic primitives. 2. Software-only solutions for N=2 threads exist (e.g. Peterson's algorithm, Dekker's). They use atomic LOADs and STOREs only and assume SEQUENTIAL CONSISTENCY. 3. On REAL hardware with RELAXED memory models (most modern CPUs), these algorithms may need explicit MEMORY BARRIERS to enforce ordering. 4. For N > 2, the algorithms generalise but become increasingly complex. 5. In practice, ALL real systems use atomic instructions (TAS, CAS) because they're hardware-cheap and correctness is easier. 6. Option A is wrong — a naive flag races. Option C is wrong — Peterson's exists. Option D ignores the complexity. _Source: OSTEP Ch 28, §28.2-28.4 (Controlling Interrupts + Just Using Loads/Stores), p. 2-4._